In This Issue
Frontiers of Engineering
December 1, 2008 Volume 38 Issue 4
Winter 2008 issue of The Bridge on Frontiers of Engineering

Roll Printing of Crystalline Nanowires for Integrated Electronic and Sensor Arrays

Friday, March 13, 2009

Author: Zhiyong Fan, Johnny C. Ho, Roie Yerushalmi, and Ali Javey

Printable microscale and nanoscale inorganic materials, such as crystalline semiconductor nanowires, provide both high performance and air stability.

Fabrication of printable sensor arrays on bendable/flexible substrates may enable the development of a wide range of new technologies, including flexible displays, radio frequency identification tags, sensor tapes, artificial skin, and more (Friedman et al., 2005; Huang et al., 2001; Lee et al., 2005; McAlpine et al., 2005; Reuss et al., 2005; Service, 2000; Someya and Sakurai, 2003). Tremendous progress has been made in this field in the past decade, mainly through the exploration of organic materials as active semiconductor components. However, the short lifetimes and low carrier mobility of these materials, as compared to crystalline inorganic semiconductors, have been major obstacles to applications that require high speed, low power, and long lasting electronics (Reuss et al., 2005; Service, 2000; Someya and Sakurai, 2003). Therefore, a new printable electronic materials technology with improved performance and air stability is of great interest for the future of printable electronics.

Recently, new methods of “printing” microscale and nanoscale inorganic structures have been proposed and developed. Unlike their organic counterparts, inor-ganic materials provide air stability as well as high performance (Ahn et al., 2006; Bryllert et al., 2006; Fan et al., 2008a,b; Ford et al., 2008; Friedman et al., 2005; Huang et al., 2001; Javey et al., 2007; Lee et al., 2005; McAlpine et al., 2005; Wang et al., 2007; Yerushalmi et al., 2007). One such inorganic material is the crystalline semiconductor nanowire (NW). In this paper, we review recent advances in the assembly and integration of NW arrays on foreign substrates that can be integrated into electronic devices and sensors.

Crystalline Semiconductor Nanowires as Building Blocks for Electronics and Sensors
To date, a variety of functional NWs have been synthesized and integrated as building blocks of single-component devices, such as field-effect transistors (FETs), sensors, photo-diodes, and electromechanical systems, to mention just a few (Ahn et al., 2006; Bryllert et al., 2006; Fan et al., 2008a,b; Ford et al., 2008; Friedman et al., 2005; Huang et al., 2001; Javey et al., 2007; Lee et al., 2005; McAlpine et al., 2005; Wang et al., 2007; Yeru-shalmi et al., 2007). These chemically derived single-crystalline nanostructures (the majority of them synthesized by chemical vapor deposition [CVD]) have unique advantages over conventional semiconductors. They enable the integration of high-performance device elements on virtually any substrate (including mechanically flexible plastics) with scaled on-currents and switching speeds comparable to or higher than those of state-of-the-art, planar silicon (Si) structures.

For example, p-type FETs based on heterostructured Ge/Si NWs and n-type FETs based on InAs NWs have demonstrated a carrier mobility about10 times higher than that of Si transistors (Bryllert et al., 2006; Ford et al., 2008; Xiang et al. 2006). These high-mobility NW materials are ideal platforms for high-performance, printable electronics. Uniquely, the electrical properties of NWs are extremely sensitive to their chemical/biological and electromagnetic surroundings because of their miniaturized dimensions, large surface-area-to-volume ratio, and finite carrier concentration. As a result, sensors based on NWs are also highly sensitive. For example, NWs made of Si and In2O3 have been extensively studied for use in biological and chemical sensors capable of detecting analytes down to the level of single molecules (Zheng et al., 2004, 2005). CdSe and ZnO NWs, which are optically active and have been investigated in the past, have demonstrated a significantly higher photo-response than their thin-film or bulk counterparts (Fan et al., 2008a; Yu et al., 2008).

Although NWs are obviously promising materials for high-performance nanoelectronics and sensors, a major challenge to their integration into large-scale devices/circuits is perfecting their controlled assembly on substrates. In recent years, many approaches have been investigated with varying degrees of success. These approaches include liquid-flow alignment, Langmuir-Blodgett technique, alternating current (AC) dielectro-phoresis, blown-bubble method, contact and roller printing, and others. In this article, we review recent progress on a highly efficient, scalable approach for the ordered, uniform assembly of NW arrays on substrates for integration in multifunctional circuits.

Roll Printing of Nanowires on Substrates
We recently developed an NW roll-printing technology to address the need for large-scale assembly of aligned NW arrays on foreign substrates (Fan et al., 2008b; Yerushamli et al., 2007). The overall process involves (1) optimized catalytic growth of the desired crystalline NWs by CVD on a cylindrical substrate (i.e., roller), and (2) patterned transfer of NWs directly from the roller to a receiver substrate via differential roll printing, as illustrated in Figure 1.

Figure 1 Differential roll printing of NWs.
FIGURE 1 Differential roll printing of NWs. (a) Schematic drawing of the printing setup. (b) Optical photograph of the assembled apparatus (top view). The inset shows the blank and NW-coated glass tubes used as rollers (I and II, respectively). (c) The NW alignment and density (inset) as a function of roller-to-wheel size ratio. (d) The alignment of the printed film is nearly independent of NW length. Source: Yerushalmi et al., 2007. Reprinted with permission.

The grown NWs stick out of the surface of the roller with random orientation. The length of the NWs is controlled by the growth time and is typically 20–80 µm for optimal printing results; the diameter (10–100 nm) is controlled by the size of the catalytic nanoparticles used as seeds for CVD growth. The roller is con-nected to a pair of rotating wheels and brought into contact with a stationary receiver substrate. As the roller is turned under a constant pressure and at a constant speed, NWs are transferred to the receiver substrate, which is coated with a photolithographically patterned photo-resist layer that enables the patterned assembly of NWs (Yerushalmi et al., 2007).

An important aspect of this printing process is the mismatch between the radius of the roller and the radius of the wheel (rR, rW, respectively), which causes a shear motion of the roller on the stationary substrate in addition to the rolling motion (Yerushalmi et al., 2007). In traditional roll-printing methods, such a mismatch would be highly undesirable and would distort the printed features. However, the relative sliding motion caused by the mismatch generates the required directing field and shear force to effectively “comb” the NWs, resulting in aligned transfer to the receiver substrate. Without the shear force, a negligible number of NWs are transferred, and their alignment is random, as shown in Figure 1c. This is consistent with the hypothesis that, as randomly aligned NWs on the growth substrates are dragged across the surface of the receiver substrate, they become aligned by mechanical combing.

Once the NWs are anchored by van der Waals forces, they are detached from the growth substrate and transferred to the receiver substrate. Interestingly, the density of the printed NWs shows a near linear dependence on rR/rW for rR/rW<1, as shown in the inset of Figure 1c. This trend is to be expected because the total number of NWs available for transfer is (2prR)nW, where n is the density of NWs on the roller substrate and W is the width of the contact area. Since the printed area covered per revolution is (2prW)W, the maximum printed density is n(rR/rW). If we compare the slope of the density of printed NWs with rR/rW, we get n~9 NW/µm (Yerushalmi et al., 2007).

We have observed that, in the range of 20–80 µm, the length of as-grown NWs does not change the printing alignment significantly, as shown in Figure 1d. The high degree of alignment (~90 percent) is independent of the length of the NW and is highly favorable for the scalability of device applications (Fan et al., 2008b). During the printing process, NWs are assembled on both the photo-resist and patterned regions of the substrates. The patterned photo-resist is later removed by a standard lift-off process using a solvent, leaving behind assembled NWs at the predefined locations (Fan et al., 2008b; Yerushalmi et al., 2007).

Figure 2  Printed NW arrays on unconventional substrates
FIGURE 2 Printed NW arrays on unconventional substrates: glass and paper (left) and plastic (right). Refer to Figure 3 for high-magnification images. Source: Yerushalmi et al., 2007. Reprinted with permission.

This process can be used for a wide range of NW materials, including Si, Ge, and compound semiconductors, and for the entire NW diameter range (10–100 nm) that has been explored. It is also compatible with a wide range of rigid and flexible receiver substrates, including glass, Si, plastics, and paper (Figure 2). Thus this approach is a highly scalable, low-cost, efficient method of assembling functional NWs on substrates and may point the way toward the realization of high-performance, flexible electronics based on printed, single-crystalline, high-mobility nano-engineered materials. Notably, the printed NW arrays are highly aligned in the direction of rolling and are limited to a monolayer (Figure 3) with no uncontrolled aggregations.

Figure 3 Optical and scanning electron microscope images of printed Ge NW arrays
FIGURE 3 (a) Optical (left) and scanning electron microscope (middle) images of printed Ge NW arrays. The printed NWs are ~30 nm in diameter. (b) Printed nanowire density as a function of the surface functionalization of the receiver substrate. Source: Fan et al., 2008b. Copyright 2008 ACS.

To shed light on the transfer mechanism and the process dynamics, and to gain better control of the printing process, we have explored the effect on the density of printed NWs of modifying the surface chemical of the receiver substrate (Fan el al., 2008b). As shown in Figure 3b, for the –CF3 terminated SiO2 surfaces (which are highly hydrophobic and not sticky), we observed almost no significant transfer of NWs (<10–3 NW/µm) from the donor to the receiver substrate. Using an identical printing process on –NH2 and –N(Me)3+ termi-nated SiO2 (which are highly hydrophilic and sticky), we observed a high-density transfer of NWs, approaching ~8 NW/µm (Fan et al., 2008b). This major modulation of printed NW density by ~4 orders of magnitude demonstrates the importance of nanoscale chemical interactions during the printing process.

A lubricant (octane and mineral oil, 2:1, v:v) is applied to all surfaces during printing. The lubricant, which serves as a spacing layer between the two substrates, minimizes NW-to-NW friction, uncontrolled breakage, and detachment of NWs. The results suggest that during the printing process NWs are dragged across a receiver substrate and are eventually detached from the roller as they are anchored to the surface-functional groups of the receiver substrate by van der Waals forces.

Printed Nanowire Arrays for Integration in Electronic Devices

We have successfully demonstrated highly uniform assembly of parallel arrays of NWs on the wafer scale, which is crucial for the fabrication and integration of high-throughput devices (Fan el al., 2008b). After patterned printing of NW arrays on the receiver substrates, which can be crystalline Si, low-cost glass, or bendable/flexible plastic, device structures can be fabricated using conventional lithography methods, with each device consisting of a parallel array of NWs.

In the most commonly explored device configurations, metal source/drain (S/D) and gate contacts are deposited by evaporation and liftoff. Because NWs are randomly positioned, not all of the printed NWs in a given region bridge the S/D electrodes. Since there is minimal NW-to-NW crossing or bundling in our assembled NWs, only the NWs that directly bridge S/D electrodes contribute to conduction. This technology is most relevant for printable macroelectronics with channel widths on the order of tens of microns or more and does not cause large device variations or degrade performance.

Figure 4 Devices based on printed NW arrays.
FIGURE 4 Devices based on printed NW arrays. (a) From top to bottom, scanning electron microscope images of back-gated, single GeNW FET, 10 µm and 250 µm wide, parallel arrayed NW FETs. (b) On-current as a function of channel-width scaling, showing a highly linear trend. Source: Fan et al., 2008b. Copyright 2008 ACS.

By tuning the width of the patterned regions for the assembly, the on-current can be readily modulated so more NWs will be involved in conduction (Figure 4) (Fan et al., 2008b). The observed linear dependence of the on-current on the device width illustrates the uniformity and reproducibility of NW printing technology over large areas. Specifically, a standard deviation s~15 percent in the on-current (for a width of ~200 µm) was observed (Javey et al., 2007).

Heterogeneous Assembly for Integration in Multifunctional Circuits
In addition to device integration, there is a great deal of interest in the development of a versatile method of heterogeneous integration of crystalline materials on substrates to add functionality to a device (e.g., combining sensing capability with conventional electronics). Because NW printing technology is done at ambient temperatures, it is uniquely suited for the heterogeneous assembly of crystalline NWs on substrates for integration in multifunctional circuits (Fan et al., 2008a).

Figure 5 Heterogeneous NW assembly for all integrated sensor circuitry.
FIGURE 5 Heterogeneous NW assembly for all integrated sensor circuitry. (A) Circuit diagram for the all-NW photo detector, with high mobility Ge/Si NW FETs (T1 and T2) amplifying the photo response of a CdSe nanosensor. (B) Schematic drawing of the all-NW optical-sensor circuit based on ordered arrays of Ge/Si and CdSe NWs. (C1) An optical image of the fabricated NW circuitry, consisting of a CdSe nanosensor (NS). (C2) Two Ge/Si core/shell NW FETs (T2 and T1). (C3) and (C4) channel widths of ~300 µm and 1 µm, respectively. Each device element in the circuit can be independently studied for dynamics and circuit debugging. Source: Fan et al., 2008a. Reprinted with permission.

For instance, high-mobility Ge NWs can be printed at certain locations on the receiver substrates to enable high-performance transistors, while optically active CdSe NWs (direct band gap, Eg~1.8eV) can be printed at other pre-defined sites to enable efficient photo detection (Fan et al., 2008a). This is in distinct contrast to conventional Si processing for which the integration of crystalline-compound semiconductors has proven to be challenging because of lattice mismatches and interface problems.

The fabrication of heterogeneous NW circuits involves two-step printing of heterostructured Ge/Si and CdSe NWs at pre-defined locations on substrates, followed by device and circuit fabrication using conventional microfabrication processing. As a proof of concept of the feasibility of using NW printing technology for heterogeneous circuitry, we fabricated Ge/Si NW amplifiers and CdSe photo detectors that are integrated on-chip on Si substrates (Figure 5). The CdSe NW photo detectors were shown to be highly responsive to white light (~100x reduction in resistance upon irradiation to ~4 mW/cm2), and the integrated Ge/Si NW FETs amplified the signal of the sensors by ~1000x.

For this demonstration, we fabricated large arrays of the proof-of-concept circuits on substrates; each circuit was used as an individual pixel to detect light and amplify the signal. Owing to the high uniformity and reproducibility of the printing process, a relatively large matrix (13 x 20) of the all-NW sensor circuits was fabricated on a chip (with a yield of greater than 80 percent) and used as an integrated imager (Figure 6) (Fan et al., 2008a). In the future, the yield can be significantly improved by optimizing NW synthesis and fabrication processing.

To demonstrate the imaging capability, a circular halogen light source was focused and projected onto the center of the array, and the circuit output current was measured and normalized on a 0–100 scale with “0” and “100” representing the minimum and maximum measured intensity. The output profile map clearly matches the variation in spatial intensity of the light source, with the intensity decreasing from the center to the outer edge of the circuit (Fan et al., 2008a). Each pixel size can be further down-scaled in the future by reducing the feature sizes, such as channel and interconnect lengths and widths. This work not only demonstrates NW device integration at an unprecedented scale, but also presents a novel system based on printed NW arrays that may have a number of technological applications with NWs as building blocks.

Figure 6 NW sensor circuitry with imaging functionality.

FIGURE 6 NW sensor circuitry with imaging functionality. (A) Schematic diagram. (B) An output profile of the integrated imager for a circular light spot (gray pixels represent defective sites). Source: Fan et al., 2008a. Reprinted with permission.

Significant progress has been made in the roll printing of NWs for highly ordered assembly of crystalline semiconductors on foreign substrates with high uniformity, regularity, and tunable density. Parallel arrays of NWs have been shown to be high-performance building blocks for diodes, transistors, and sensors that can be readily integrated into functional circuits on unconventional substrates, such as bendable plastics. In addition, heterogeneous integration can be achieved using a multi-step printing process at ambient temperatures. This approach may lead to the development of a wide range of novel printable electronics that are unattainable with conventional Si processing.

This work was supported by DARPA/MTO, Intel, and MARCO MSD. The nanowire synthesis was supported by a LDRD from Lawrence Berkeley National Laboratory. In addition, Johnny Ho has a graduate fellowship from Intel Foundation. All fabrication was performed in the Berkeley Microfabrication Laboratory.

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About the Author:Zhiyong Fan is a postdoctoral fellow, University of California at Berkeley. Johnny C. Ho is a graduate student, University of California at Berkeley. Roie Yerushalmi is senior lecturer, Institute of Chemistry, Hebrew University of Jerusalem. Ali Javey is assistant professor, Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, and principal investigator, Lawrence Berkeley National Laboratory.